intel d850mvl bios tweaks

Post by **garyb** » Mon Mar 25, 2002 12:06 am

got it for the lan.it works great and is really stable,but i think it should still work better.any useful utilities to tweak the pitiful bios?(pci latency espec)tweak bios is not for the i850......
thanks!

Rob van Berkel · Post by **Rob van Berkel** » Mon Mar 25, 2002 2:05 pm

afaik there is no utility to alter settings on the i850 chipset. I'm in need for one as well, 'cuz I want high PCI-latency when I boot win98 (pulsar), and normal when booting win2k ('normal' pc-stuff). I'm looking into linux kernel-sources right now to see if there's a clue on how to read and write the chipset registers.
I'll be back...

Post by **garyb** » Mon Mar 25, 2002 10:05 pm

thanks!

Rob van Berkel · Post by **Rob van Berkel** » Tue Mar 26, 2002 3:19 pm

Geez.. My quest is over and I found out how to tweak the Latency-values of the PCI-bus. First of all, it is not the latency you're tweaking (although it's named that way in BIOS). The thing to fiddle with is named Multi Transaction Timer Register and is part of the PCI-PCI Hub on the ICH2 of the I850 chipset. Tweaking is done by H-Oda's WPCRSET utility. ALthough H-Oda stopped his support the tool must still be out there somewhere.
After installing the tool, start WPCRSET and fill in the fields:
bus: 0
device: 30
function: 0
register: 70
data: 20

Data=20 (hex) is the default and represents 32 PCI-clocks. To set it to 128 PCI-clocks use Data=80. You can confirm the changes to register 70 by starting WPCREDIT, SelectDevice (Bus 0,Dev 30,Func 0), and check out the bytes at location 70. They should read what you just entered.
Still with me? Hope so

Goodluck,

Rob

at0m · Post by **at0m** » Tue Mar 26, 2002 3:45 pm

http://www.h-oda.com/

Rob van Berkel · Post by **Rob van Berkel** » Tue Mar 26, 2002 9:58 pm

Thanx At0mic, last thing I remembered was that Mr. Oda stopped support and removed the downloads from his page. I didn't check because I had the tools lying around here.
Mark that only WPCREDIT is available. To access all tools go here.
Btw, on H-Oda's site you're encouraged to download *.pcr files to support your chipset. All these files do is add nice descriptions and example values for all the registers, making tweaking a bit more intuitive. Although I'm busy working on the 850 set of files you don't need them to change the Multi Transaction Timer Register as described in my previous post.

Rob

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[ This Message was edited by: rvberkel on 2002-03-26 22:02 ]

Post by **garyb** » Tue Mar 26, 2002 10:54 pm

this is good news.

Rob van Berkel · Post by **Rob van Berkel** » Wed Mar 27, 2002 12:16 am

Garyb: Hope it works the same for you as it does for me. I'm on ABit TH7-II(w/o RAID) and it works very well. Let me know, ok?
Btw, by entering value 00h in the register you completely disable intervention of the bus-arbiter, resulting in arbitrary long PCI-bursts. Sounds ideal for Creamware, but it will probably hang your PC, as it did mine.

Rob

Rob van Berkel · Post by **Rob van Berkel** » Thu Mar 28, 2002 1:12 am

On 2002-03-26 22:54, garyb wrote:
this is good news.

Was wondering if the good news worked for you.
I have little means to acuratley test the effects, as I already run 11 MV's without tweaking, and I'm running out of DSP power (instead of PCI-bandwidth).
Meanwhile I'm trying to comprehend the relationship between the MTT register (at address 70h) on the ICH2 and the (per-device) latency register (MLT at 0Dh).
Reading the ICH2 manual reveals some other (minor?) points at which tweaking may result in better PCI throughput for our beloved Pulsars, some depending on the manufacturers implementation of the chipset in their design.
I realize all this has nothing to do with Pulsars and making music, it's just that this tweaking is one of my other areas of interest where some of us in the P-community may have benefits from when trying to get the most out of their setup.
To be continued...

Rob

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[ This Message was edited by: rvberkel on 2002-03-28 01:13 ]

Post by **garyb** » Thu Mar 28, 2002 1:42 am

well, the program seems to work well in that i can use it to hang the system,but i don't seem to gain any performance.oh well.

Rob van Berkel · Post by **Rob van Berkel** » Thu Mar 28, 2002 4:10 am

What windows are you on, Garyb? I tested on Win98SE

Post by **garyb** » Thu Mar 28, 2002 9:20 pm

98 se

Rob van Berkel · Post by **Rob van Berkel** » Wed Apr 03, 2002 5:22 am

Garyb, it still puzzles me what part stops your PC from functioning. e.g when starting WPCREDIT (make sure no other apps are running) and you do a SelectDevice (Bus 0,Dev 30,Func 0) what value does position 70h read? (probably 20h = 32 PCI-clocks)
Can you edit this value and enter 40h?
Does your PC still function? Can you now start Pulsar software.
I would very much apreciate your answers.
Rob

Post by **garyb** » Wed Apr 03, 2002 10:10 am

oh, it works fine. i've changed reg 70 to 90. no crashes or hangs.no noticable performance increase in pulsar tho.(i know it's working 'cause i meesed with some OTHER reg to cause the sys to hang....

Rob van Berkel · Post by **Rob van Berkel** » Wed Apr 03, 2002 12:15 pm

Oh, ok

Post by **garyb** » Thu Apr 04, 2002 12:09 am

still interested in anything else you find........

Rob van Berkel · Post by **Rob van Berkel** » Thu Apr 04, 2002 12:28 am

really? It didn't apear to me you were, but maybe that was my interpretation.
Anyway, my problem in testing the effects on the pci-bandwidth is that lower values of the 'latency' still let me do the <A HREF="http://www.berkel.net/mv.gif" TARGET="_blank">MV-test</A>. I run out of DSP's sooner than I run out of pci-bandwidth. No I'm not complaining

Any suggestions on stressing the PCI-bus more than I already do?
Taking out the stdm-cable is no option as the resulting traffic between the cards will probably run from board to board, and what I want is generate a bigger load between board and ICH2/MCH, because it is THAT connection that I want to have optimized.
Btw, is it so that the first Pulsar-board communicates on the PCI-bus, and the second one does it through the stdm-bus and then the first board? In other words, only one board masters the bus - they're not fighting for space on the pci-bus?
Any info on these matters is more than welcome.
Rob

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[ This Message was edited by: rvberkel on 2002-04-04 00:30 ]

Post by **garyb** » Thu Apr 04, 2002 3:57 am

yes, i believe you are correct about cw bus connects.you're right also,i'm near giving up on tweeks for a minute.(still got the ear to the ground tho)